An asynchronous circuit synthesis system developed over a number of years at the APT group of the School of Computer Science, The University of Manchester. Balsa refers to both a language and a set of tools used for synthesising asynchronous circuits.
Balsa is built around the Handshake Circuits methology and can generate gate level netlists from high-level descriptions in the Balsa language. Both dual-rail (QDI) and single-rail (bundled data) circuits can be generated, and the resulting netlists can be mapped onto FPGAs.